CSREAESA
2006
14 years 5 months ago
2006
Abstract
ARC
2006
Springer
14 years 8 months ago
2006
Springer
Abstract. This paper presents a novel partially reconfigurable FIR filter design that employs dynamic partial reconfiguration. Our scope is to implement a low-power, area-efficient...
IPPS
2007
IEEE
14 years 10 months ago
2007
IEEE
The Xilinx Virtex family of FPGAs provides the ability to perform partial run-time reconfiguration, also known as dynamic partial reconfiguration (DPR). Taking this concept one st...