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    JSA
    2010
    102views more  JSA 2010»
    On reducing load/store latencies of cache accesses
    13 years 5 months ago
    On reducing load/store latencies of cache accesses
    Download  www.cs.utah.edu
    — Effective address calculation for load and store instructions needs to compete for ALU with other instructions and hence extra latencies might be incurred to data cache accesse...
    Yuan-Shin Hwang, Jia-Jhe Li
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    ISCA
    1995
    IEEE
    120views Hardware» more  ISCA 1995»
    Streamlining Data Cache Access with Fast Address Calculation
    13 years 10 months ago
    Streamlining Data Cache Access with Fast Address Calculation
    Download  www.eecs.umich.edu
    For many programs, especially integer codes, untolerated load instruction latencies account for a significant portion of total execution time. In this paper, we present the desig...
    Todd M. Austin, Dionisios N. Pnevmatikatos, Gurind...
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