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ARVLSI
1997
IEEE
151views VLSI» more  ARVLSI 1997»
14 years 3 months ago
The Hierarchical Multi-Bank DRAM: A High-Performance Architecture for Memory Integrated with Processors
A microprocessor integrated with DRAM on the same die has the potential to improve system performance by reducing the memory latency and improving the memory bandwidth. However, a...
Tadaaki Yamauchi, Lance Hammond, Kunle Olukotun
ISSS
1998
IEEE
219views Hardware» more  ISSS 1998»
14 years 4 months ago
Issues in Embedded DRAM Development and Applications
After being niche markets for several years, application markets for one-chip integration of large DRAMs and logic circuits are growing very rapidly as the transition to 0.25
Doris Keitel-Schulz, Norbert Wehn