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ISCAS
2008
IEEE
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ISCAS 2008
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A novel VLSI iterative divider architecture for fast quotient generation
14 years 6 months ago
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www.npic.edu.tw
—In this paper, a novel VLSI iterative divider architecture for fast quotient generation that is based on radix-2 non-restoring division is proposed. To speed up the quotient gen...
Tso-Bing Juang, Sheng-Hung Chen, Shin-Mao Li
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