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    ASPDAC
    2008
    ACM
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    An optimal algorithm for sizing sequential circuits for industrial library based designs
    14 years 2 months ago
    An optimal algorithm for sizing sequential circuits for industrial library based designs
    Download  vlsi.ece.wisc.edu
    In this paper, we propose an optimal gate sizing and clock skew optimization algorithm for globally sizing synchronous sequential circuits. The number of constraints and variables ...
    Sanghamitra Roy, Yu Hen Hu, Charlie Chung-Ping Che...
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