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36
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ASWEC
2007
IEEE
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Software Engineering
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ASWEC 2007
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Formal Validation of Hierarchical State Machines against Expectations
14 years 5 months ago
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www.cs.york.ac.uk
This paper explains some analyses that can be performed on a hierarchical finite state machine to validate that it performs as intended. Such a hierarchical state machine has tra...
Ian Toyn, Andy Galloway
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