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    ASPDAC
    2008
    ACM
    97views Hardware» more  ASPDAC 2008»
    A Compiler-in-the-Loop framework to explore Horizontally Partitioned Cache architectures
    14 years 7 months ago
    A Compiler-in-the-Loop framework to explore Horizontally Partitioned Cache architectures
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    Horizontally Partitioned Caches (HPCs) are a promising architectural feature to reduce the energy consumption of the memory subsystem. However, the energy reduction obtained using...
    Aviral Shrivastava, Ilya Issenin, Nikil Dutt
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