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IJES
2008
128views more  IJES 2008»
13 years 11 months ago
On-chip implementation of multiprocessor networks and switch fabrics
: On-chipimplementationofmultiprocessorsystemsneedstoplanarisetheinterconnect networks onto the silicon floorplan. Compared with traditional ASIC/SoC architectures, Multiprocessor ...
Terry Tao Ye, Giovanni De Micheli
IJES
2008
45views more  IJES 2008»
13 years 11 months ago
Safe execution of untrusted applications on embedded network processors
Herbert Bos, Bart Samwel, Mihai-Lucian Cristea, Ko...
IJES
2008
102views more  IJES 2008»
13 years 11 months ago
Alternative application-specific processor architectures for fast arbitrary bit permutations
Block ciphers are used to encrypt data and provide data confidentiality. For interoperability reasons, it is desirable to support a variety of block ciphers efficiently. Of the bas...
Zhijie Jerry Shi, Xiao Yang, Ruby B. Lee
IJES
2008
101views more  IJES 2008»
13 years 11 months ago
The Artemis workbench for system-level performance evaluation of embedded systems
In this article, we present an overview of the Artemis workbench, which provides modelling and simulation methods and tools for efficient performance evaluation and exploration of ...
Andy D. Pimentel
IJES
2008
76views more  IJES 2008»
13 years 11 months ago
SoC multiprocessor debugging and synchronisation using generic dynamic-connect debugger frontends
: Current and future SoC designs will contain an increasing number of programmable units. To be able to tailor and debug these processors in their system context at the highest pos...
Andreas Wieferink, Tim Kogel, Olaf Zerres, Rainer ...
IJES
2008
52views more  IJES 2008»
13 years 11 months ago
A HW/SW design methodology for embedded SIMD vector signal processors
Pablo Robelly, Gordon Cichon, H. Ahlendorf, Gerhar...
IJES
2008
83views more  IJES 2008»
13 years 11 months ago
Evaluating memory architectures for media applications on Coarse-grained Reconfigurable Architectures
Reconfigurable ALU Array (RAA) architectures--representing a popular class of Coarse-grained Reconfigurable Architectures--are gaining in popularity especially for media applicati...
Jong-eun Lee, Kiyoung Choi, Nikil Dutt
IJES
2008
130views more  IJES 2008»
13 years 11 months ago
Deriving efficient control in Process Networks with Compaan/Laura
: At Leiden Embedded Research Center (LERC), we are building a tool chain called Compaan/Laura that allows us to map rapidly and efficiently signal processing applications written ...
Steven Derrien, Alexandru Turjan, Claudiu Zissules...