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33
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ACSD
2004
IEEE
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ACSD 2004
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Logic Synthesis for Asynchronous Circuits Based on Petri Net Unfoldings and Incremental SAT
14 years 8 days ago
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www.cs.ncl.ac.uk
The behaviour of asynchronous circuits is often described by Signal Transition Graphs (STGs), which are Petri nets whose transitions are interpreted as rising and falling edges of...
Victor Khomenko, Maciej Koutny, Alexandre Yakovlev
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