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    Instruction Level Parallelism through Microthreading - A Scalable Approach to Chip Multiprocessors
    14 years 20 days ago
    Instruction Level Parallelism through Microthreading - A Scalable Approach to Chip Multiprocessors
    Download  staff.science.uva.nl
    Most microprocessor chips today use an out-of-order instruction execution mechanism. This mechanism allows superscalar processors to extract reasonably high levels of instruction ...
    Kostas Bousias, Nabil Hasasneh, Chris R. Jesshope
    claim paper
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