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    2002
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    Power-optimal encoding for a DRAM address bus
    14 years 16 days ago
    Power-optimal encoding for a DRAM address bus
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    This paper presents an irredundant encoding technique to minimize the switching activity on a multiplexed Dynamic RAM (DRAM) address bus. The DRAM switching activity can be classif...
    Wei-Chung Cheng, Massoud Pedram
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