ISCA
2002
IEEE
13 years 11 months ago
2002
IEEE
This paper introduces the Simulation Architecture Description Language (SADL) developed at the National Aeronautics and Space Administration's Marshall Space Flight Center to...
ISCA
2002
IEEE
13 years 11 months ago
2002
IEEE
In this paper, we consider the tree task graphs which arise from many important programming paradigms such as divide and conquer, branch and bound etc., and the linear task-graphs...
ISCA
2002
IEEE
13 years 11 months ago
2002
IEEE
Traditional vector architectures have shown to be very effective for regular codes where the compiler can detect data-level parallelism. However, this SIMD parallelism is also pre...
ISCA
2002
IEEE
13 years 11 months ago
2002
IEEE
ISCA
2002
IEEE
14 years 4 months ago
2002
IEEE
We propose a scheme for transient-fault recovery called Simultaneously and Redundantly Threaded processors with Recovery (SRTR) that enhances a previously proposed scheme for tran...
ISCA
2002
IEEE
14 years 4 months ago
2002
IEEE
One architectural method for increasing processor performance involves increasing the frequency by implementing deeper pipelines. This paper will explore the relationship between ...
ISCA
2002
IEEE
14 years 4 months ago
2002
IEEE
We develop an availability solution, called SafetyNet, that uses a unified, lightweight checkpoint/recovery mechanism to support multiple long-latency fault detection schemes. At...
ISCA
2002
IEEE
14 years 4 months ago
2002
IEEE
This paper introduces the idea of using a User-Level Memory Thread (ULMT) for correlation prefetching. In this approach, a user thread runs on a general-purpose processor in main ...
ISCA
2002
IEEE
14 years 4 months ago
2002
IEEE
This paper presents the Alpha EV8 conditional branch predictor. The Alpha EV8 microprocessor project, canceled in June 2001 in a late phase of development, envisioned an aggressiv...
ISCA
2002
IEEE
14 years 4 months ago
2002
IEEE
Increasing the number of instruction queue (IQ) entries in a dynamically scheduled processor exposes more instruction-level parallelism, leading to higher performance. However, in...