ICS
2000
Tsinghua U.
14 years 2 months ago
2000
Tsinghua U.
One of the main concerns in today's processor design is the issue logic. Instruction-level parallelism is usually favored by an out-of-order issue mechanism where instruction...
ICS
2001
Tsinghua U.
14 years 3 months ago
2001
Tsinghua U.
The issue logic of dynamically scheduled superscalar processors is one of their most complex and power-consuming parts. In this paper we present alternative issue-logic designs th...