JSA
2000
13 years 10 months ago
2000
As the density of VLSI circuits increases it becomes attractive to integrate dedicated test logic on a chip. This Built-in Self-Test (BIST) approach not only offers economic benef...
JSA
2000
13 years 10 months ago
2000
In this article, the problem of finding a tight estimate on the worst-case execution time (WCET) of a real-time program is addressed. The analysis is focused on straight-line code...
JSA
2000
13 years 10 months ago
2000
JSA
2000
13 years 10 months ago
2000
This paper presents an efficient routing and flow control mechanism to implement multidestination message passing in wormhole networks.It is targeted to situations where the size ...
JSA
2000
13 years 10 months ago
2000
Integrating processors and main memory is a promising approach to increase system performance. Such integration provides very high memory bandwidth that can be exploited efficientl...
JSA
2000
13 years 10 months ago
2000
Portable products are being used increasingly. Because these systems are battery powered, reducing power consumption is vital. In this report we give the properties of low power d...
JSA
2000
13 years 10 months ago
2000
Scheduling DAGs with communication times is the theoretical basis for achieving efficient parallelism on distributed memory systems. We generalize Graham's task-level in a ma...
JSA
2000
13 years 10 months ago
2000
In (2n)1)-stage rearrangeable networks, the routing time for any arbitrary permutation is X(n2 ) compared to its propagation delay O(n) only. Here, we attempt to identify the sets...
JSA
2000
13 years 10 months ago
2000
JSA
2000
13 years 10 months ago
2000
We propose an approach to determine the shortest path between the source and the destination nodes in a faulty or a nonfaulty hypercube. The number of faulty nodes and links may b...