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JSA
2010
173views more  JSA 2010»
13 years 6 months ago
Hardware/software support for adaptive work-stealing in on-chip multiprocessor
During the past few years, embedded digital systems have been requested to provide a huge amount of processing power and functionality. A very likely foreseeable step to pursue th...
Quentin L. Meunier, Frédéric P&eacut...
JSA
2010
158views more  JSA 2010»
13 years 6 months ago
Scalable mpNoC for massively parallel systems - Design and implementation on FPGA
The high chip-level integration enables the implementation of large-scale parallel processing architectures with 64 and more processing nodes on a single chip or on an FPGA device...
Mouna Baklouti, Yassine Aydi, Philippe Marquet, Je...
JSA
2010
95views more  JSA 2010»
13 years 6 months ago
Multi-level reconfigurable architectures in the switch model
In this paper we study multi-level dynamically reconfigurable architectures. These are extensions of standard reconfigurable architectures where ordinary reconfiguration operation...
Sebastian Lange, Martin Middendorf
JSA
2010
80views more  JSA 2010»
13 years 10 months ago
A scalable organization for distributed directories
Alberto Ros, Manuel E. Acacio, José M. Garc...
JSA
2010
101views more  JSA 2010»
13 years 10 months ago
Experimental evaluation of slack management in real-time control systems: Coordinated vs. self-triggered approach
Effective slack management, i.e. management of unused computing resources, for real-time control tasks mandates to redistribute the available resources between controllers as a f...
Manel Velasco, Pau Martí, Josep M. Fuertes,...
JSA
2010
102views more  JSA 2010»
13 years 10 months ago
On reducing load/store latencies of cache accesses
— Effective address calculation for load and store instructions needs to compete for ALU with other instructions and hence extra latencies might be incurred to data cache accesse...
Yuan-Shin Hwang, Jia-Jhe Li