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51
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ASPDAC
2005
ACM
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ASPDAC 2005
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VLSI on-chip power/ground network optimization considering decap leakage currents
14 years 5 months ago
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www.ee.ucr.edu
- In today’s power/ground(P/G) network design, on-chip decoupling capacitors(decaps) are usually made of MOS transistors with source and drain connected together. The gate leak...
Jingjing Fu, Zuying Luo, Xianlong Hong, Yici Cai, ...
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