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    2004
    ACM
    160views Computer Architecture» more  WMPI 2004»
    Addressing mode driven low power data caches for embedded processors
    14 years 8 months ago
    Addressing mode driven low power data caches for embedded processors
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    The size and speed of first-level caches and SRAMs of embedded processors continue to increase in response to demands for higher performance. In power-sensitive devices like PDAs a...
    Ramesh V. Peri, John Fernando, Ravi Kolagotla
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