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ASYNC
2002
IEEE
112views Hardware» more  ASYNC 2002»
14 years 5 months ago
A Negative-Overhead, Self-Timed Pipeline
This paper presents a novel variation of wave pipelining that we call “surfing.” In previous wave pipelined designs, timing uncertainty grows monotonically as events propagat...
Mark R. Greenstreet, Brian D. Winters
RTAS
2007
IEEE
14 years 6 months ago
Optimizing the FPGA Implementation of HRT Systems
The availability of programmable hardware devices with high density of logic elements and the possibility of implementing CPUs (called softcores) using a fraction of the FPGA area...
Marco Di Natale, Enrico Bini