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    GLVLSI
    2007
    IEEE
    192views VLSI» more  GLVLSI 2007»
    Area efficient loop filter design for charge pump phase locked loop
    14 years 5 months ago
    Area efficient loop filter design for charge pump phase locked loop
    Download  ece.iisc.ernet.in
    In this paper, two new dual-path based area efficient loop filter circuits are proposed for Charge Pump Phase Locked Loop (CPPLL). The proposed circuits were designed in 0.25µ CS...
    R. G. Raghavendra, Bharadwaj Amrutur
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