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29
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GLVLSI
2007
IEEE
158
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VLSI
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GLVLSI 2007
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RT-level vector selection for realistic peak power simulation
13 years 10 months ago
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ir.lib.nthu.edu.tw
We present a vector selection methodology for estimating the peak power dissipation in a CMOS logic circuit. The ultimate goal is to combine the speed of RT-level simulation with ...
Chia-Chien Weng, Ching-Shang Yang, Shi-Yu Huang
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