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27
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VTS
2002
IEEE
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VTS 2002
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Testing High-Speed SoCs Using Low-Speed ATEs
14 years 3 months ago
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www.utdallas.edu
We present a test methodology to allow testing high-speed circuits with low-speed ATEs. The basic strategy is adding an interface circuit to partially supply test data, coordinate...
Mehrdad Nourani, James Chin
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