Abstract--This paper presents a technology mapping algorithm for field-programmable gate array architectures with dual supply voltages (Vdds) for power optimization. This is done w...
Deming Chen, Jason Cong, Chen Dong, Lei He, Fei Li...
The aim of this paper is to study the influence of processor mapping on message passing performance of two different parallel computers: the Cray T3E and the SGI Origin 2000. For t...
In this paper we study the technology mapping problem of FPGA architectures with dual supply voltages (Vdds) for power optimization. This is done with the guarantee that the mappi...
This paper proposes a library-free technology mapping algorithm to reduce delay in combinational circuits. The algorithm reduces the overall number of series transistors through t...
Felipe S. Marques, Leomar S. da Rosa Jr., Renato P...
Intellectual Properties (IPs) mapping algorithms for On-Chip-Networks (OCNs) allocate a set of IPs onto given network topologies. The existing mapping algorithms limit a single IP...
The growing importance of ontology mapping on the Semantic Web has highlighted the need to manage the uncertain nature of interpreting semantic meta data represented by heterogeneo...