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ERSA
2010
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ERSA 2010
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Reconfigurable Sparse Matrix-Vector Multiplication on FPGAs
13 years 9 months ago
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www.ecs.umass.edu
Cache-based, general purpose CPUs perform at a small fraction of their maximum floating point performance when executing memory-intensive simulations, such as those required for sp...
Russell Tessier, Salma Mirza, J. Blair Perot
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