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31
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ISVLSI
2003
IEEE
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ISVLSI 2003
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Joint Minimization of Power and Area in Scan Testing by Scan Cell Reordering
14 years 1 months ago
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This paper describes a technique for re-ordering of scan cells to minimize power dissipation that is also capable of reducing the area overhead of the circuit compared to a random...
Shalini Ghosh, Sugato Basu, Nur A. Touba
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