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34
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GLVLSI
2007
IEEE
167
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GLVLSI 2007
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A new approach to logic synthesis of multi-output boolean functions on pal-based CPLDS
14 years 6 months ago
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www.cin.ufpe.br
A PAL-based logic block is the core of great majority of contemporary CPLD devices. The purpose of the paper is to present a new approach to multi-level synthesis for PAL-based CP...
Dariusz Kania
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