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32
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HICSS
1996
IEEE
102
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HICSS 1996
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Evaluation of Parallel Logic Simulation Using DVSIM
14 years 21 days ago
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www.vs.inf.ethz.ch
Parallel simulation is expected to speed up simulation run time in a signi cant way. This paper describes a framework that is used to evaluate the performance of parallel simulati...
Gerd Meister
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