Sciweavers

TELSYS
2002
131views more  TELSYS 2002»
14 years 2 days ago
Call Blocking Performance Study for PCS Networks under More Realistic Mobility Assumptions
Abstract. In the micro-cell-based PCS networks, due to the high user mobility, handoffs occur more frequently. Hence, the classical assumptions, such as the exponential assumptions...
Helen Zeng, Yuguang Fang, Imrich Chlamtac
TCAD
2002
86views more  TCAD 2002»
14 years 2 days ago
Platune: a tuning framework for system-on-a-chip platforms
System-on-a-chip (SOC) platform manufacturers are increasingly adding configurable features that provide power and performance flexibility in order to increase a platform's ap...
Tony Givargis, Frank Vahid
TPDS
1998
64views more  TPDS 1998»
14 years 3 days ago
Modeled and Measured Instruction Fetching Performance for Superscalar Microprocessors
—Instruction fetching is critical to the performance of a superscalar microprocessor. We develop a mathematical model for three different cache techniques and evaluate its perfor...
Steven Wallace, Nader Bagherzadeh
TPDS
1998
98views more  TPDS 1998»
14 years 3 days ago
A Basic-Cycle Calculation Technique for Efficient Dynamic Data Redistribution
—Array redistribution is usually required to enhance algorithm performance in many parallel programs on distributed memory multicomputers. Since it is performed at run-time, ther...
Yeh-Ching Chung, Ching-Hsien Hsu, Sheng-Wen Bai
SIGMETRICS
2002
ACM
14 years 3 days ago
Full-system timing-first simulation
Computer system designers often evaluate future design alternatives with detailed simulators that strive for functional fidelity (to execute relevant workloads) and performance fi...
Carl J. Mauer, Mark D. Hill, David A. Wood
TC
1998
14 years 3 days ago
Analysis of Checkpointing Schemes with Task Duplication
—This paper suggests a technique for analyzing the performance of checkpointing schemes with task duplication. We show how this technique can be used to derive the average execut...
Avi Ziv, Jehoshua Bruck
TC
1998
14 years 3 days ago
Using System-Level Models to Evaluate I/O Subsystem Designs
—We describe a system-level simulation model and show that it enables accurate predictions of both I/O subsystem and overall system performance. In contrast, the conventional app...
Gregory R. Ganger, Yale N. Patt
RTS
2002
113views more  RTS 2002»
14 years 3 days ago
Feedback-Feedforward Scheduling of Control Tasks
A scheduling architecture for real-time control tasks is proposed. The scheduler uses feedback from execution-time measurements and feedforward from workload changes to adjust the...
Anton Cervin, Johan Eker, Bo Bernhardsson, Karl-Er...
RE
2002
Springer
14 years 3 days ago
Automating Speculative Queries through Event-Based Requirements Traceability
Posing speculative questions about a software system is an important yet often unsupported activity. Current impact analysis techniques tend to focus upon the functionality of the...
Jane Cleland-Huang, Carl K. Chang, Gaurav Sethi, K...
PPL
2002
108views more  PPL 2002»
14 years 3 days ago
An Efficient Implementation of the BSP Programming Library for VIA
Virtual Interface Architecture(VIA) is a light-weight protocol for protected user-level zero-copy communication. In spite of the promised high performance of VIA, previous MPI imp...
Yang-Suk Kee, Soonhoi Ha