Abstract. In the micro-cell-based PCS networks, due to the high user mobility, handoffs occur more frequently. Hence, the classical assumptions, such as the exponential assumptions...
System-on-a-chip (SOC) platform manufacturers are increasingly adding configurable features that provide power and performance flexibility in order to increase a platform's ap...
—Instruction fetching is critical to the performance of a superscalar microprocessor. We develop a mathematical model for three different cache techniques and evaluate its perfor...
—Array redistribution is usually required to enhance algorithm performance in many parallel programs on distributed memory multicomputers. Since it is performed at run-time, ther...
Computer system designers often evaluate future design alternatives with detailed simulators that strive for functional fidelity (to execute relevant workloads) and performance fi...
—This paper suggests a technique for analyzing the performance of checkpointing schemes with task duplication. We show how this technique can be used to derive the average execut...
—We describe a system-level simulation model and show that it enables accurate predictions of both I/O subsystem and overall system performance. In contrast, the conventional app...
A scheduling architecture for real-time control tasks is proposed. The scheduler uses feedback from execution-time measurements and feedforward from workload changes to adjust the...
Anton Cervin, Johan Eker, Bo Bernhardsson, Karl-Er...
Posing speculative questions about a software system is an important yet often unsupported activity. Current impact analysis techniques tend to focus upon the functionality of the...
Jane Cleland-Huang, Carl K. Chang, Gaurav Sethi, K...
Virtual Interface Architecture(VIA) is a light-weight protocol for protected user-level zero-copy communication. In spite of the promised high performance of VIA, previous MPI imp...