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ASPDAC
2006
ACM

115views Hardware» more ASPDAC 2006»

Area optimization for leakage reduction and thermal stability in nanometer scale technologies

14 years 5 months ago

- Traditionally, minimum possible area of a VLSI layout is considered the best for delay and power minimization due to decreased interconnect capacitance. This paper shows however ...

Ja Chun Ku, Yehea I. Ismail

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