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ARC
2010
Springer
189views Hardware» more  ARC 2010»
14 years 1 months ago
3D Compaction: A Novel Blocking-Aware Algorithm for Online Hardware Task Scheduling and Placement on 2D Partially Reconfigurable
Abstract. Few of the benefits of exploiting partially reconfigurable devices are power consumption reduction, cost reduction, and customized performance improvement. To obtain thes...
Thomas Marconi, Yi Lu 0004, Koen Bertels, Georgi G...
HPCC
2007
Springer
14 years 3 months ago
Power-Aware Fat-Tree Networks Using On/Off Links
Abstract. Nowadays, power consumption reduction techniques are being increasingly used in computer systems, and high-performance computing systems are not an exception. In particul...
Marina Alonso, Salvador Coll, Vicente Santonja, Ju...
NOSSDAV
2009
Springer
14 years 6 months ago
Power efficient real-time disk scheduling
Hard-disk drive power consumption reduction methods focus mainly on increasing the amount of time the disk is in standby mode (disk spun down) by implementing aggressive data read...
Damien Le Moal, Donald Molaro, Jorge Campello
ICCAD
2006
IEEE
110views Hardware» more  ICCAD 2006»
14 years 8 months ago
Voltage island aware floorplanning for power and timing optimization
Power consumption is a crucial concern in nanometer chip design. Researchers have shown that multiple supply voltage (MSV) is an effective method for power consumption reduction....
Wan-Ping Lee, Hung-Yi Liu, Yao-Wen Chang