Sciweavers

CORR
2006
Springer
103views Education» more  CORR 2006»
14 years 10 days ago
VXA: A Virtual Architecture for Durable Compressed Archives
Data compression algorithms change frequently, and obsolete decoders do not always run on new hardware and operating systems, threatening the long-term usability of content archiv...
Bryan Ford
CDES
2006
112views Hardware» more  CDES 2006»
14 years 1 months ago
A New Processor Architecture with a New Program Driving Method
- This paper proposes a new type of processor architecture using a new program driving method which makes it possible for more programs to run in a single kernel processor concurre...
Xiaobo Li, Ke Luo, Xiangdong Cui, Lalin Jiang, Xia...
RECOSOC
2007
160views Hardware» more  RECOSOC 2007»
14 years 1 months ago
Stack processor architecture and development methods suitable for dependable applications
Nowadays, reconfigurable and multiprocessor systems are becoming increasingly attractive for many applications. Such systems should be more and more dependable especially if error...
Mehdi Jallouli, Camille Diou, Fabrice Monteiro
PACS
2000
Springer
83views Hardware» more  PACS 2000»
14 years 3 months ago
A Comparison of Two Architectural Power Models
Reducing power, on both a per cycle basis and as the total energy used over the lifetime of an application, has become more important as small and embedded devices become increasi...
Soraya Ghiasi, Dirk Grunwald
ISCA
1992
IEEE
151views Hardware» more  ISCA 1992»
14 years 4 months ago
An Elementary Processor Architecture with Simultaneous Instruction Issuing from Multiple Threads
In this paper, we propose a multithreaded processor architecture which improves machine throughput. In our processor architecture, instructions from different threads (not a singl...
Hiroaki Hirata, Kozo Kimura, Satoshi Nagamine, Yos...
SAC
2006
ACM
14 years 6 months ago
A concurrent reactive Esterel processor based on multi-threading
Esterel is a concurrent synchronous language for developing reactive systems. As an alternative to the classical software and hardware synthesis paths, the reactive processing app...
Xin Li, Reinhard von Hanxleden
ARCS
2009
Springer
14 years 6 months ago
Evaluating CMPs and Their Memory Architecture
Abstract. Many-core processor architectures require scalable solutions that reflect the locality and power constraints of future generations of technology. This paper presents a CM...
Chris R. Jesshope, Mike Lankamp, Li Zhang