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ISCA
2007
IEEE
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ISCA 2007
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Mechanisms for bounding vulnerabilities of processor structures
14 years 5 months ago
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www.cse.psu.edu
Concern for the increasing susceptibility of processor structures to transient errors has led to several recent research efforts that propose architectural techniques to enhance r...
Niranjan Soundararajan, Angshuman Parashar, Anand ...
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