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ERSA
2004
118views Hardware» more  ERSA 2004»
14 years 7 months ago
Energy-Efficiency of the MONTIUM Reconfigurable Tile Processor
Paul M. Heysters, Gerard J. M. Smit, Egbert Molenk...
FCCM
2004
IEEE
152views VLSI» more  FCCM 2004»
14 years 10 months ago
Implementing and Evaluating Stream Applications on the Dynamically Reconfigurable Processor
Dynamically Reconfigurable Processor (DRP)[1] developed by NEC Electronics is a coarse grain reconfigurable processor that selects a data path from the on-chip repository of sixte...
Noriaki Suzuki, Shunsuke Kurotaki, Masayasu Suzuki...
IPPS
2006
IEEE
15 years 11 days ago
Analysis of a reconfigurable network processor
In this paper an analysis of a dynamically reconfigurable processor is presented. The network processor incorporates a processor and a number of coprocessors that can be connected...
Christopher Kachris, Stamatis Vassiliadis
IPPS
2007
IEEE
15 years 19 days ago
A General Purpose Partially Reconfigurable Processor Simulator (PReProS)
An innovative technique to model and simulate partial and dynamic reconfigurable processors is presented in this paper. The basis for development is a SystemC kernel modified for ...
Alisson Vasconcelos De Brito, Matthias Kühnle...