Sciweavers

VTS
1997
IEEE
105views Hardware» more  VTS 1997»
14 years 4 months ago
Critical hazard free test generation for asynchronous circuits
We describe a technique to generate critical hazard-free tests for self-timed control circuits build using a macromodule library, in a partial scan based DFT environment. Wepropos...
Ajay Khoche, Erik Brunvand