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VTS
1997
IEEE
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VTS 1997
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Critical hazard free test generation for asynchronous circuits
14 years 4 months ago
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web.cecs.pdx.edu
We describe a technique to generate critical hazard-free tests for self-timed control circuits build using a macromodule library, in a partial scan based DFT environment. Wepropos...
Ajay Khoche, Erik Brunvand
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