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EURODAC
1995
IEEE
126views VHDL» more  EURODAC 1995»
14 years 3 months ago
Use of embedded scheduling to compile VHDL for effective parallel simulation
This paper describes VHDL compilation techniques, embodied in the Auriga compiler [3,14], which facilitate parallel or distributed simulation by embedding evaluation scheduling in...
John Willis, Zhiyuan Li, Tsang-Puu Lin