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    ARCS
    2009
    Springer
    145views Software Engineering» more  ARCS 2009»
    Improving Memory Subsystem Performance Using ViVA: Virtual Vector Architecture
    14 years 7 months ago
    Improving Memory Subsystem Performance Using ViVA: Virtual Vector Architecture
    Download  crd.lbl.gov
    The disparity between microprocessor clock frequencies and memory latency is a primary reason why many demanding applications run well below peak achievable performance. Software c...
    Joseph Gebis, Leonid Oliker, John Shalf, Samuel Wi...
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