Modern VLSI processing supports a two-dimensional surface for active devices along with multiple stacked layers of interconnect. With the advent of planarization, the number of la...
Cohen et al. [5] recently initiated the theoretical study of connection caching in the world-wide web. They extensively studied uniform connection caching, where the establishment...
In this paper, we study the design of fault tolerant networks for arrays and meshes by adding redundant nodes and edges. For a target graph G (linear array or mesh in this paper),...
This paper presents mathematical foundations for the design of a memory controller subcomponent that helps to bridge the processor/memory performance gap for applications with str...
Binu K. Mathew, Sally A. McKee, John B. Carter, Al...
We conduct an experimental analysis of a distributed, randomized algorithm for edge coloring graphs. The algorithm is extremely simple, yet, according to the probabilistic analysi...
Madhav V. Marathe, Alessandro Panconesi, Larry D. ...