—Previous vector architectures divided the available register file space in a fixed number of registers of equal sizes and shapes. We propose a register file organization whic...
Catalin Bogdan Ciobanu, Georgi Kuzmanov, Georgi Ga...
Abstract. The innovation of this work is a simple vectorizable algorithm for performing sparse matrix vector multiply in compressed sparse row (CSR) storage format. Unlike the vect...
Eduardo F. D'Azevedo, Mark R. Fahey, Richard Tran ...