This site uses cookies to deliver our services and to ensure you get the best experience. By continuing to use this site, you consent to our use of cookies and acknowledge that you have read and understand our Privacy Policy, Cookie Policy, and Terms
—A high-throughput hardware architecture and FPGA implementation of the 64-bit NESSIE proposal, MISTY1 block cipher, is presented in this paper. This architecture, in contrast to...
Paris Kitsos, Michalis D. Galanis, Odysseas G. Kou...