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VLSID
1997
IEEE
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VLSI
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VLSID 1997
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Synthesis for Logical Initializability of Synchronous Finite State Machines
14 years 4 months ago
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www.cs.unc.edu
—Logical initializability is the property of a gate-level circuit whereby it can be driven to a unique start state when simulated by a three-valued (0, 1, ) simulator. In practic...
Montek Singh, Steven M. Nowick
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