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    ASPDAC
    2005
    ACM
    92views Hardware» more  ASPDAC 2005»
    Sleep transistor sizing using timing criticality and temporal currents
    14 years 2 months ago
    Sleep transistor sizing using timing criticality and temporal currents
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    — Power gating is a circuit technique that enables high performance and low power operation. One of the challenges in power gating is sizing the sleep transistor which is used to...
    Anand Ramalingam, Bin Zhang, Anirudh Devgan, David...
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