Sciweavers

ICPP
2008
IEEE
14 years 6 months ago
Thread-Sensitive Modulo Scheduling for Multicore Processors
This paper describes a generalisation of modulo scheduling to parallelise loops for SpMT processors that exploits simultaneously both instruction-level parallelism and thread-leve...
Lin Gao 0002, Quan Hoang Nguyen, Lian Li 0002, Jin...