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ICCAD
2006
IEEE
113views Hardware» more  ICCAD 2006»
14 years 7 months ago
Layer minimization of escape routing in area array packaging
We devise a central triangular sequence to minimize the escape routing layers in area array packaging. We use a network flow model to analyze the bottleneck of the routable pins. ...
Renshen Wang, Rui Shi, Chung-Kuan Cheng