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    SAC
    2010
    ACM
    159views Applied Computing» more  SAC 2010»
    A machine-checked soundness proof for an efficient verification condition generator
    13 years 10 months ago
    A machine-checked soundness proof for an efficient verification condition generator
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    Verification conditions (VCs) are logical formulae whose validity implies the correctness of a program with respect to a specification. The technique of checking software properti...
    Frédéric Vogels, Bart Jacobs 0002, F...
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