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WSC
1998
14 years 25 days ago
SEAMS: Simulation Environment for VHDL-AMS
VHDL-AMS is an Analog and Mixed-Signal extension to the Very High Speed Integrated Circuit Hardware Description Language (VHDL). With the standardization of VHDL-AMS, capable and ...
Peter Frey, Kathiresan Nellayappan, Vasudevan Sahn...