Sciweavers

IPCV
2007
14 years 27 days ago
Use of Paraplanar Constraint for Parallel Inspection of Wafer Bump Heights
- The shrunk dimension of electronic devices leads to more stringent requirement on process control and quality assurance of their fabrication. For instance, direct die-to-die bond...
Mei Dong, Ronald Chung, Edmund Y. Lam, Kenneth S. ...