CASES 2003 - PDF Preprint Papers

CASES 2003 International Conference on Compilers

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CASES
2003
ACM

184views System Software» more CASES 2003»

AES and the cryptonite crypto processor

14 years 4 months ago

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CRYPTONITE is a programmable processor tailored to the needs of crypto algorithms. The design of CRYPTONITE was based on an in-depth application analysis in which standard crypto ...

Dino Oliva, Rainer Buchty, Nevin Heintze

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Id	Views	Title	Status

1	184	AES and the cryptonite crypto processor	claim
2	167	A hierarchical approach for energy efficient application design using heterogeneous embedded systems	claim
3	166	Compiler optimization and ordering effects on VLIW code compression	claim
4	166	Encryption overhead in embedded systems and sensor network nodes: modeling and analysis	claim
5	161	Power efficient encoding techniques for off-chip data buses	claim
6	153	Compiler-decided dynamic memory allocation for scratch-pad based embedded systems	claim
7	147	Clustered calculation of worst-case execution times	claim
8	134	Extending STI for demanding hard-real-time systems	claim
9	133	A control-theoretic approach to dynamic voltage scheduling	claim
10	132	Vectorizing for a SIMdD DSP architecture	claim
11	131	A low-power accelerator for the SPHINX 3 speech recognition system	claim
12	129	Exploiting bank locality in multi-bank memories	claim
13	125	Graphical user interface energy characterization for handheld computers	claim
14	113	Polynomial-time algorithm for on-chip scratchpad memory partitioning	claim
15	104	Frequent loop detection using efficient non-intrusive on-chip hardware	claim
16	103	Architectural optimizations for low-power, real-time speech recognition	claim
17	99	Efficient spill code for SDRAM	claim
18	96	Lattice-based memory allocation	claim
19	94	Programming challenges in network processor deployment	claim
20	94	Reducing code size with echo instructions	claim
21	89	Energy aware algorithm design via probabilistic computing: from algorithms and models to Moore's law and novel (semiconductor) devices	claim
22	84	Task-level timing models for guaranteed performance in multiprocessor networks-on-chip	claim
23	77	A new look at exploiting data parallelism in embedded systems	claim

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