CHES 2003 - PDF Preprint Papers

CHES 2003 International Workshop on Cryptographic Hardware and Embedded Systems

Teaser Browsing | Click Here

Title Browsing | Click Here

Wall of Fame | Most Viewed CHES-2003 Paper

click to vote

CHES
2003
Springer

247views Cryptology» more CHES 2003»

Very Compact FPGA Implementation of the AES Algorithm

14 years 4 months ago

Download volgenau.gmu.edu

Abstract. In this paper a compact FPGA architecture for the AES algorithm with 128-bit key targeted for low-cost embedded applications is presented. Encryption, decryption and key ...

Pawel Chodowiec, Kris Gaj

claim paper

Read More »

Disclaimer and Copyright Notice

Sciweavers respects the rights of all copyright holders and in this regard, authors are only allowed to share a link to their preprint paper on their own website. Every contribution is associated with a desciptive image. It is the sole responsibility of the authors to ensure that their posted image is not copyright infringing. This service is compliant with IEEE copyright.

Id	Views	Title	Status

1	247	Very Compact FPGA Implementation of the AES Algorithm	claim
2	151	Attacking RSA-Based Sessions in SSL/TLS	claim
3	149	Attacking Unbalanced RSA-CRT Using SPA	claim
4	146	Unified Hardware Architecture for 128-Bit Block Ciphers AES and Camellia	claim
5	146	Efficient Implementation of Rijndael Encryption in Reconfigurable Hardware: Improvements and Design Tradeoffs	claim
6	145	Cryptanalysis of DES Implemented on Computers with Cache	claim
7	135	A Practical Countermeasure against Address-Bit Differential Power Analysis	claim
8	119	Faster Double-Size Modular Multiplication from Euclidean Multipliers	claim
9	115	The Doubling Attack - Why Upwards Is Better than Downwards	claim
10	115	A More Flexible Countermeasure against Side Channel Attacks Using Window Method	claim
11	114	True Random Number Generators Secure in a Changing Environment	claim
12	106	Hyperelliptic Curve Cryptosystems: Closing the Performance Gap to Elliptic Curves	claim
13	104	Power-Analysis Attacks on an FPGA - First Experimental Results	claim
14	100	Multi-channel Attacks	claim
15	100	Security Evaluation of Asynchronous Circuits	claim
16	100	Countermeasures against Differential Power Analysis for Hyperelliptic Curve Cryptosystems	claim
17	97	On the Security of PKCS#11	claim
18	88	A New Algorithm for Switching from Arithmetic to Boolean Masking	claim

Sciweavers

Explore & Download

Productivity Tools

Document Tools

Image Tools

Sciweavers