CHES 2006 - PDF Preprint Papers

CHES 2006 International Workshop on Cryptographic Hardware and Embedded Systems

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CHES
2006
Springer

246views Cryptology» more CHES 2006»

Pinpointing the Side-Channel Leakage of Masked AES Hardware Implementations

14 years 4 months ago

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This article starts with a discussion of three different attacks on masked AES hardware implementations. This discussion leads to the conclusion that glitches in masked circuits po...

Stefan Mangard, Kai Schramm

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Id	Views	Title	Status

1	246	Pinpointing the Side-Channel Leakage of Masked AES Hardware Implementations	claim
2	205	Automated Design of Cryptographic Devices Resistant to Multiple Side-Channel Attacks	claim
3	188	A Generalized Method of Differential Fault Attack Against AES Cryptosystem	claim
4	179	Offline Hardware/Software Authentication for Reconfigurable Platforms	claim
5	158	Hardware/Software Co-design of Elliptic Curve Cryptography on an 8051 Microcontroller	claim
6	156	HIGHT: A New Block Cipher Suitable for Low-Resource Device	claim
7	152	Security Evaluation of DPA Countermeasures Using Dual-Rail Pre-charge Logic Style	claim
8	146	Path Swapping Method to Improve DPA Resistance of Quasi Delay Insensitive Asynchronous Circuits	claim
9	137	Provably Secure S-Box Implementation Based on Fourier Transform	claim
10	134	Read-Proof Hardware from Protective Coatings	claim
11	133	Fast Generation of Prime Numbers on Portable Devices: An Update	claim
12	131	Why One Should Also Secure RSA Public Key Elements	claim
13	125	Implementing the Elliptic Curve Method of Factoring in Reconfigurable Hardware	claim
14	124	A Proposition for Correlation Power Analysis Enhancement	claim
15	123	Improving SHA-2 Hardware Implementations	claim
16	119	NanoCMOS-Molecular Realization of Rijndael	claim
17	117	High-Resolution Side-Channel Attack Using Phase-Based Waveform Matching	claim
18	111	Cache-Collision Timing Attacks Against AES	claim
19	108	Superscalar Coprocessor for High-Speed Curve-Based Cryptography	claim
20	105	Implementing Cryptographic Pairings on Smartcards	claim
21	105	Power Attack on Small RSA Public Exponent	claim
22	97	Challenges for Trusted Computing	claim
23	88	Dual-Rail Random Switching Logic: A Countermeasure to Reduce Side Channel Leakage	claim
24	87	Instruction Set Extensions for Efficient AES Implementation on 32-bit Processors	claim
25	87	Templates vs. Stochastic Methods	claim
26	86	Breaking Ciphers with COPACOBANA - A Cost-Optimized Parallel Code Breaker	claim
27	84	Integer Factoring Utilizing PC Cluster	claim
28	82	FPGA Implementation of Point Multiplication on Koblitz Curves Using Kleinian Integers	claim
29	81	Template Attacks in Principal Subspaces	claim
30	75	Towards Security Limits in Side-Channel Attacks	claim
31	74	Optically Enhanced Position-Locked Power Analysis	claim

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