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APCCAS
2006
IEEE

Low Power Pre-Comparison Scheme for NOR-Type 10T Content Addressable Memory

14 years 5 months ago
Low Power Pre-Comparison Scheme for NOR-Type 10T Content Addressable Memory
—A pre-comparison scheme is designed by using the NOR-type 10T content addressable memory (CAM) between the match line circuits and the pre-charging circuits. Thereby, several bits are pre-compared in advance through the precomparison circuit. With the pre-comparison scheme, it will reduce the discharging time and power consumption when the match line is mismatch. The size of the CAM array is about 32 words, and each word has 32bits. The proposed precomparison NOR-type 10T CAM can achieve 22.8% power reduction for the 4bits pre-comparison circuit. All the simulation results are based on TSMC 0.13um CMOS technology and the clock frequency is 500MHz.
Po-Tsang Huang, Wei-Keng Chang, Wei Hwang
Added 10 Jun 2010
Updated 10 Jun 2010
Type Conference
Year 2006
Where APCCAS
Authors Po-Tsang Huang, Wei-Keng Chang, Wei Hwang
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